Key Points:
- Powertech Technology announced plans to begin mass production of artificial intelligence chips using fan-out panel-level packaging by mid-2027.
- The company committed 70 billion New Taiwan dollars ($2.2 billion) to ramp up its P11 packaging facility in the Hsinchu Science Park.
- Advanced Micro Devices and Broadcom have fully booked the company’s panel-level packaging capacity through 2030.
- Rectangular panel processing allows fabricators to produce approximately 45 large AI processors in a single pass, compared to just 8 or 9 on traditional round wafers.
Taiwanese semiconductor packaging leader Powertech Technology is preparing to revolutionize how the world manufactures high-performance computing hardware. The company announced plans to become the first manufacturer globally to commercialize large-scale artificial intelligence chip production using fan-out panel-level packaging by mid-2027. The breakthrough marks a critical turning point for next-generation semiconductor manufacturing, offering a high-throughput, cost-efficient alternative to conventional wafer-based packaging techniques that have constrained global artificial intelligence chip supply.
To support the manufacturing ramp-up, the enterprise is investing a total of 70 billion New Taiwan dollars, equivalent to approximately $2.2 billion. The advanced packaging operations center on the company’s newly expanded P11 facility in the Hsinchu Science Park. Building upon an advanced cleanroom site acquired late last year, the facility provides end-to-end packaging and testing capabilities, with monthly capacity scheduled to expand from 1,000 rectangular panels this year to 5,000 panels by 2028.
The commercial debut follows six years of internal research and development. In public statements unveiling the technology, corporate leadership described the multi-billion-dollar initiative as the largest strategic gamble in company history. That investment has paid off early: management confirmed that 100% of the facility’s planned packaging capacity is already fully booked through 2030 by two marquee global technology clients, eliminating customer acquisition risks as factory lines come online.
Supply chain filings confirm that semiconductor giants Advanced Micro Devices and Broadcom serve as the primary anchor customers backing the new production lines. Advanced Micro Devices plans to utilize the panel-level packaging process for its next-generation artificial intelligence server central processing units and high-performance accelerators, with initial commercial shipments scheduled for mid-2027. Broadcom is partnering with the firm on high-density redistribution layer substrates to power custom application-specific integrated circuits.
The fundamental advantage of fan-out panel-level packaging lies in geometric efficiency. For decades, the semiconductor industry packaged microchips on traditional round silicon wafers measuring 300 millimeters in diameter. However, because modern artificial intelligence processors have grown massive in physical die size, fitting square chips onto a round wafer leaves substantial edge space wasted, allowing only eight or nine large processors per wafer pass. By contrast, processing large rectangular panels measuring 510 by 510 millimeters allows fabricators to produce approximately 45 large AI chips in a single pass, boosting usable surface area by more than three times.
Shifting from round wafers to rectangular glass or organic panels delivers massive cost efficiencies for chip designers. Manufacturing analysts estimate that panel-level processing reduces total packaging expenses by 20% to 30% while significantly shortening production cycle times. More importantly, the technology provides a vital relief valve for the global semiconductor industry, which has suffered from multi-year supply bottlenecks in conventional chip-on-wafer-on-substrate packaging lines managed by leading contract foundries.
Achieving high manufacturing yields on large rectangular panels has historically challenged semiconductor engineers due to thermal warpage and uneven fluid dispensing across large surface areas. Through collaborative engineering with precision equipment makers, Powertech successfully mitigated panel warpage and optimized fluid flow during the underfill process, driving production yields past 90% and reaching over 99% in specialized dispensing benchmarks. Achieving reliable yields paved the way for immediate commercialization.
In addition to domestic expansions in Taiwan, the company is building an international footprint. Powertech is investing $400 million to secure a 30% equity stake in a $5.66 billion joint-venture manufacturing entity in Singapore alongside Broadcom. The Singapore facility will provide secondary panel-level packaging capacity and manufacture co-packaged optics switches using silicon photonics, scheduled to commence mass production next year to speed up data transmission between AI server racks.
As global technology giants race to build multi-gigawatt artificial intelligence data centers, packaging technology has evolved from a routine post-fabrication step into the primary frontier of semiconductor innovation. By mastering fan-out panel-level packaging and securing multi-year customer commitments through 2030, Powertech is establishing a formidable new growth engine. The $2.2 billion commercialization roadmap marks a major milestone for global computing, ensuring that the hardware powering future artificial intelligence breakthroughs can scale efficiently and economically.
